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hwacc_vmx.h File Reference


Detailed Description

HWACC/VMX - VMX Structures and Definitions.

Definition in file hwacc_vmx.h.

#include <VBox/types.h>
#include <VBox/err.h>
#include <VBox/cpum.h>
#include <iprt/assert.h>
#include <iprt/asm.h>

Go to the source code of this file.

Defines

#define VMXReadVMCS   VMXReadVMCS32
#define VMXWriteVMCS   VMXWriteVMCS32
#define MSR_IA32_VMX_BASIC_INFO_VMCS_DUAL_MON(a)   ((a >> 49ULL) & 1)
#define MSR_IA32_VMX_BASIC_INFO_VMCS_ID(a)   (a & 0x7FFFFFFF)
#define MSR_IA32_VMX_BASIC_INFO_VMCS_MEM_TYPE(a)   ((a >> 50ULL) & 0xF)
#define MSR_IA32_VMX_BASIC_INFO_VMCS_PHYS_WIDTH(a)   ((a >> 48ULL) & 1)
#define MSR_IA32_VMX_BASIC_INFO_VMCS_SIZE(a)   ((a >> 31ULL) & 0xFFF)
#define MSR_IA32_VMX_MISC_ACTIVITY_STATES(a)   ((a >> 6ULL) & 0x7)
#define MSR_IA32_VMX_MISC_CR3_TARGET(a)   ((a >> 16ULL) & 0x1FF)
#define MSR_IA32_VMX_MISC_MAX_MSR(a)   ((((a >> 25ULL) & 0x7) + 1) * 512)
#define MSR_IA32_VMX_MISC_MSEG_ID(a)   (a >> 32ULL)
#define MSR_IA32_VMX_VMCS_ENUM_HIGHEST_INDEX(a)   ((a >> 1ULL) & 0x1FF)
#define VMX_CMS_GUEST_ACTIVITY_ACTIVE   0x0
#define VMX_CMS_GUEST_ACTIVITY_HLT   0x1
#define VMX_CMS_GUEST_ACTIVITY_SHUTDOWN   0x2
#define VMX_CMS_GUEST_ACTIVITY_SIPI_WAIT   0x3
#define VMX_EFLAGS_RESERVED_0   (~0xffc08028)
#define VMX_EFLAGS_RESERVED_1   0x00000002
#define VMX_ERROR_VMCALL   1
#define VMX_ERROR_VMCALL_INVALID_MSEG_REVISION   22
#define VMX_ERROR_VMCALL_INVALID_SMM_MONITOR   24
#define VMX_ERROR_VMCALL_INVALID_VMEXIT_FIELDS   20
#define VMX_ERROR_VMCALL_NON_CLEAR_VMCS   19
#define VMX_ERROR_VMCLEAR_INVALID_PHYS_ADDR   2
#define VMX_ERROR_VMCLEAR_INVALID_VMXON_PTR   3
#define VMX_ERROR_VMENTRY_EXEC_VMCS_PTR   18
#define VMX_ERROR_VMENTRY_INVALID_CONTROL_FIELDS   7
#define VMX_ERROR_VMENTRY_INVALID_HOST_STATE   8
#define VMX_ERROR_VMENTRY_INVALID_VM_EXEC_CTRL   25
#define VMX_ERROR_VMENTRY_INVALID_VMCS_EXEC_PTR   16
#define VMX_ERROR_VMENTRY_MOV_SS   26
#define VMX_ERROR_VMENTRY_NON_LAUNCHED_EXEC_VMCS   17
#define VMX_ERROR_VMLAUCH_NON_CLEAR_VMCS   4
#define VMX_ERROR_VMPTRLD_INVALID_PHYS_ADDR   9
#define VMX_ERROR_VMPTRLD_VMXON_PTR   10
#define VMX_ERROR_VMPTRLD_WRONG_VMCS_REVISION   11
#define VMX_ERROR_VMREAD_INVALID_COMPONENT   12
#define VMX_ERROR_VMRESUME_CORRUPTED_VMCS   6
#define VMX_ERROR_VMRESUME_NON_LAUNCHED_VMCS   5
#define VMX_ERROR_VMWRITE_INVALID_COMPONENT   VMX_ERROR_VMREAD_INVALID_COMPONENT
#define VMX_ERROR_VMWRITE_READONLY_COMPONENT   13
#define VMX_ERROR_VMXOFF_DUAL_MONITOR   23
#define VMX_ERROR_VMXON_IN_VMX_ROOT_OP   15
#define VMX_EXIT_CPUID   10
#define VMX_EXIT_CRX_MOVE   28
#define VMX_EXIT_DRX_MOVE   29
#define VMX_EXIT_ERR_INVALID_GUEST_STATE   33
#define VMX_EXIT_ERR_MACHINE_CHECK   41
#define VMX_EXIT_ERR_MSR_LOAD   34
#define VMX_EXIT_EXCEPTION   0
#define VMX_EXIT_EXTERNAL_IRQ   1
#define VMX_EXIT_HLT   12
#define VMX_EXIT_INIT_SIGNAL   3
#define VMX_EXIT_INVD   13
#define VMX_EXIT_INVPG   14
#define VMX_EXIT_IO_SMI_IRQ   5
#define VMX_EXIT_IRQ_WINDOW   7
#define VMX_EXIT_MONITOR   39
#define VMX_EXIT_MWAIT   36
#define VMX_EXIT_PAUSE   40
#define VMX_EXIT_PORT_IO   30
#define VMX_EXIT_RDMSR   31
#define VMX_EXIT_RDPMC   15
#define VMX_EXIT_RDTSC   16
#define VMX_EXIT_RSM   17
#define VMX_EXIT_SIPI   4
#define VMX_EXIT_SMI_IRQ   6
#define VMX_EXIT_TASK_SWITCH   9
#define VMX_EXIT_TPR   43
#define VMX_EXIT_TRIPLE_FAULT   2
#define VMX_EXIT_VMCALL   18
#define VMX_EXIT_VMCLEAR   19
#define VMX_EXIT_VMLAUNCH   20
#define VMX_EXIT_VMPTRLD   21
#define VMX_EXIT_VMPTRST   22
#define VMX_EXIT_VMREAD   23
#define VMX_EXIT_VMRESUME   24
#define VMX_EXIT_VMWRITE   25
#define VMX_EXIT_VMXOFF   26
#define VMX_EXIT_VMXON   27
#define VMX_EXIT_WRMSR   32
#define VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(a)   (a & VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID)
#define VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID   RT_BIT(11)
#define VMX_EXIT_INTERRUPTION_INFO_NMI_UNBLOCK(a)   (a & RT_BIT(12))
#define VMX_EXIT_INTERRUPTION_INFO_TYPE(a)   ((a >> VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT) & 7)
#define VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT   8
#define VMX_EXIT_INTERRUPTION_INFO_VALID(a)   (a & RT_BIT(31))
#define VMX_EXIT_INTERRUPTION_INFO_VALID_SHIFT   31
#define VMX_EXIT_INTERRUPTION_INFO_VECTOR(a)   (a & 0xff)
#define VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(a)   (a & ~RT_BIT(12))
#define VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT   0
#define VMX_EXIT_INTERRUPTION_INFO_TYPE_HWEXCPT   3
#define VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI   2
#define VMX_EXIT_INTERRUPTION_INFO_TYPE_SW   4
#define VMX_EXIT_INTERRUPTION_INFO_TYPE_SWEXCPT   6
#define VMX_EXIT_QUALIFICATION_CRX_ACCESS(a)   ((a >> 4) & 3)
#define VMX_EXIT_QUALIFICATION_CRX_ACCESS_CLTS   2
#define VMX_EXIT_QUALIFICATION_CRX_ACCESS_LMSW   3
#define VMX_EXIT_QUALIFICATION_CRX_ACCESS_READ   1
#define VMX_EXIT_QUALIFICATION_CRX_ACCESS_WRITE   0
#define VMX_EXIT_QUALIFICATION_CRX_GENREG(a)   ((a >> 8) & 0xF)
#define VMX_EXIT_QUALIFICATION_CRX_LMSW_DATA(a)   ((a >> 16) & 0xFFFF)
#define VMX_EXIT_QUALIFICATION_CRX_LMSW_OP(a)   ((a >> 6) & 1)
#define VMX_EXIT_QUALIFICATION_CRX_REGISTER(a)   (a & 0xF)
#define VMX_EXIT_QUALIFICATION_CRX_RES1(a)   ((a >> 7) & 1)
#define VMX_EXIT_QUALIFICATION_CRX_RES2(a)   ((a >> 12) & 0xF)
#define VMX_EXIT_QUALIFICATION_DRX_DIRECTION(a)   ((a >> 4) & 1)
#define VMX_EXIT_QUALIFICATION_DRX_DIRECTION_READ   1
#define VMX_EXIT_QUALIFICATION_DRX_DIRECTION_WRITE   0
#define VMX_EXIT_QUALIFICATION_DRX_GENREG(a)   ((a >> 8) & 0xF)
#define VMX_EXIT_QUALIFICATION_DRX_REGISTER(a)   (a & 7)
#define VMX_EXIT_QUALIFICATION_DRX_RES1(a)   ((a >> 3) & 1)
#define VMX_EXIT_QUALIFICATION_DRX_RES2(a)   ((a >> 5) & 7)
#define VMX_EXIT_QUALIFICATION_IO_DIRECTION(a)   ((a >> 3) & 1)
#define VMX_EXIT_QUALIFICATION_IO_ENCODING(a)   ((a >> 6) & 1)
#define VMX_EXIT_QUALIFICATION_IO_PORT(a)   ((a >> 16) & 0xffff)
#define VMX_EXIT_QUALIFICATION_IO_REP(a)   ((a >> 5) & 1)
#define VMX_EXIT_QUALIFICATION_IO_STRING(a)   ((a >> 4) & 1)
#define VMX_EXIT_QUALIFICATION_IO_WIDTH(a)   (a & 7)
#define VMX_EXIT_QUALIFICATION_IO_DIRECTION_IN   1
#define VMX_EXIT_QUALIFICATION_IO_DIRECTION_OUT   0
#define VMX_EXIT_QUALIFICATION_IO_ENCODING_DX   0
#define VMX_EXIT_QUALIFICATION_IO_ENCODING_IMM   1
#define VMX_VMCS_CTRL_CR0_MASK   0x6000
#define VMX_VMCS_CTRL_CR0_READ_SHADOW   0x6004
#define VMX_VMCS_CTRL_CR3_TARGET_VAL0   0x6008
#define VMX_VMCS_CTRL_CR3_TARGET_VAL1   0x600A
#define VMX_VMCS_CTRL_CR3_TARGET_VAL2   0x600C
#define VMX_VMCS_CTRL_CR3_TARGET_VAL31   0x600E
#define VMX_VMCS_CTRL_CR4_MASK   0x6002
#define VMX_VMCS_CTRL_CR4_READ_SHADOW   0x6006
#define VMX_VMCS_CTRL_CR3_TARGET_COUNT   0x400A
#define VMX_VMCS_CTRL_ENTRY_CONTROLS   0x4012
#define VMX_VMCS_CTRL_ENTRY_EXCEPTION_ERRCODE   0x4018
#define VMX_VMCS_CTRL_ENTRY_INSTR_LENGTH   0x401A
#define VMX_VMCS_CTRL_ENTRY_IRQ_INFO   0x4016
#define VMX_VMCS_CTRL_ENTRY_MSR_LOAD_COUNT   0x4014
#define VMX_VMCS_CTRL_EXCEPTION_BITMAP   0x4004
#define VMX_VMCS_CTRL_EXIT_CONTROLS   0x400C
#define VMX_VMCS_CTRL_EXIT_MSR_LOAD_COUNT   0x4010
#define VMX_VMCS_CTRL_EXIT_MSR_STORE_COUNT   0x400E
#define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MASK   0x4006
#define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MATCH   0x4008
#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS   0x4000
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS   0x4002
#define VMX_VMCS_CTRL_TPR_TRESHOLD   0x401C
#define VMX_VMCS_CTRL_ENTRY_CONTROLS_DEACTIVATE_DUALMON   RT_BIT(11)
#define VMX_VMCS_CTRL_ENTRY_CONTROLS_ENTRY_SMM   RT_BIT(10)
#define VMX_VMCS_CTRL_ENTRY_CONTROLS_IA64_MODE   RT_BIT(9)
#define VMX_VMCS_CTRL_EXEC_VMCS_PTR_FULL   0x200C
#define VMX_VMCS_CTRL_EXEC_VMCS_PTR_HIGH   0x200D
#define VMX_VMCS_CTRL_IO_BITMAP_A_FULL   0x2000
#define VMX_VMCS_CTRL_IO_BITMAP_A_HIGH   0x2001
#define VMX_VMCS_CTRL_IO_BITMAP_B_FULL   0x2002
#define VMX_VMCS_CTRL_IO_BITMAP_B_HIGH   0x2003
#define VMX_VMCS_CTRL_MSR_BITMAP_FULL   0x2004
#define VMX_VMCS_CTRL_MSR_BITMAP_HIGH   0x2005
#define VMX_VMCS_CTRL_TSC_OFFSET_FULL   0x2010
#define VMX_VMCS_CTRL_TSC_OFFSET_HIGH   0x2011
#define VMX_VMCS_CTRL_VAPIC_PAGEADDR_FULL   0x2012
#define VMX_VMCS_CTRL_VAPIC_PAGEADDR_HIGH   0x2013
#define VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_FULL   0x200A
#define VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_HIGH   0x200B
#define VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_FULL   0x2008
#define VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_HIGH   0x2009
#define VMX_VMCS_CTRL_VMEXIT_MSR_STORE_FULL   0x2006
#define VMX_VMCS_CTRL_VMEXIT_MSR_STORE_HIGH   0x2007
#define VMX_VMCS_CTRL_EXIT_CONTROLS_ACK_EXTERNAL_IRQ   RT_BIT(15)
#define VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_AMD64   RT_BIT(9)
#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_EXT_INT_EXIT   RT_BIT(0)
#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_NMI_EXIT   RT_BIT(3)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_LOAD_EXIT   RT_BIT(19)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_STORE_EXIT   RT_BIT(20)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_HLT_EXIT   RT_BIT(7)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_INVLPG_EXIT   RT_BIT(9)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_IRQ_WINDOW_EXIT   RT_BIT(2)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MONITOR_EXIT   RT_BIT(29)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MOV_DR_EXIT   RT_BIT(23)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MWAIT_EXIT   RT_BIT(10)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT   RT_BIT(30)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDPMC_EXIT   RT_BIT(11)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT   RT_BIT(12)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_TSC_OFFSET   RT_BIT(3)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_UNCOND_IO_EXIT   RT_BIT(24)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_IO_BITMAPS   RT_BIT(25)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_MSR_BITMAPS   RT_BIT(28)
#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW   RT_BIT(21)
#define VMX_VMCS_GUEST_ACTIVITY_STATE   0x4826
#define VMX_VMCS_GUEST_CS_ACCESS_RIGHTS   0x4816
#define VMX_VMCS_GUEST_CS_LIMIT   0x4802
#define VMX_VMCS_GUEST_DS_ACCESS_RIGHTS   0x481A
#define VMX_VMCS_GUEST_DS_LIMIT   0x4806
#define VMX_VMCS_GUEST_ES_ACCESS_RIGHTS   0x4814
#define VMX_VMCS_GUEST_ES_LIMIT   0x4800
#define VMX_VMCS_GUEST_FS_ACCESS_RIGHTS   0x481C
#define VMX_VMCS_GUEST_FS_LIMIT   0x4808
#define VMX_VMCS_GUEST_GDTR_LIMIT   0x4810
#define VMX_VMCS_GUEST_GS_ACCESS_RIGHTS   0x481E
#define VMX_VMCS_GUEST_GS_LIMIT   0x480A
#define VMX_VMCS_GUEST_IDTR_LIMIT   0x4812
#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE   0x4824
#define VMX_VMCS_GUEST_LDTR_ACCESS_RIGHTS   0x4820
#define VMX_VMCS_GUEST_LDTR_LIMIT   0x480C
#define VMX_VMCS_GUEST_SS_ACCESS_RIGHTS   0x4818
#define VMX_VMCS_GUEST_SS_LIMIT   0x4804
#define VMX_VMCS_GUEST_SYSENTER_CS   0x482A
#define VMX_VMCS_GUEST_TR_ACCESS_RIGHTS   0x4822
#define VMX_VMCS_GUEST_TR_LIMIT   0x480E
#define VMX_VMCS_GUEST_CR0   0x6800
#define VMX_VMCS_GUEST_CR3   0x6802
#define VMX_VMCS_GUEST_CR4   0x6804
#define VMX_VMCS_GUEST_CS_BASE   0x6808
#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS   0x6822
#define VMX_VMCS_GUEST_DR7   0x681A
#define VMX_VMCS_GUEST_DS_BASE   0x680C
#define VMX_VMCS_GUEST_ES_BASE   0x6806
#define VMX_VMCS_GUEST_FS_BASE   0x680E
#define VMX_VMCS_GUEST_GDTR_BASE   0x6816
#define VMX_VMCS_GUEST_GS_BASE   0x6810
#define VMX_VMCS_GUEST_IDTR_BASE   0x6818
#define VMX_VMCS_GUEST_LDTR_BASE   0x6812
#define VMX_VMCS_GUEST_RFLAGS   0x6820
#define VMX_VMCS_GUEST_RIP   0x681E
#define VMX_VMCS_GUEST_RSP   0x681C
#define VMX_VMCS_GUEST_SS_BASE   0x680A
#define VMX_VMCS_GUEST_SYSENTER_EIP   0x6826
#define VMX_VMCS_GUEST_SYSENTER_ESP   0x6824
#define VMX_VMCS_GUEST_TR_BASE   0x6814
#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B0   RT_BIT(0)
#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B1   RT_BIT(1)
#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B2   RT_BIT(2)
#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B3   RT_BIT(3)
#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BREAKPOINT_ENABLED   RT_BIT(12)
#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS   RT_BIT(14)
#define VMX_VMCS_GUEST_DEBUGCTL_FULL   0x2802
#define VMX_VMCS_GUEST_DEBUGCTL_HIGH   0x2803
#define VMX_VMCS_GUEST_LINK_PTR_FULL   0x2800
#define VMX_VMCS_GUEST_LINK_PTR_HIGH   0x2801
#define VMX_VMCS_GUEST_FIELD_CS   0x802
#define VMX_VMCS_GUEST_FIELD_DS   0x806
#define VMX_VMCS_GUEST_FIELD_ES   0x800
#define VMX_VMCS_GUEST_FIELD_FS   0x808
#define VMX_VMCS_GUEST_FIELD_GS   0x80A
#define VMX_VMCS_GUEST_FIELD_LDTR   0x80C
#define VMX_VMCS_GUEST_FIELD_SS   0x804
#define VMX_VMCS_GUEST_FIELD_TR   0x80E
#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS   RT_BIT(1)
#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_NMI   RT_BIT(3)
#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_SMI   RT_BIT(2)
#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI   RT_BIT(0)
#define VMX_VMCS_GUEST_LINEAR_ADDR   0x640A
#define VMX_VMCS_RO_EXIT_QUALIFICATION   0x6400
#define VMX_VMCS_RO_IO_RCX   0x6402
#define VMX_VMCS_RO_IO_RDI   0x6406
#define VMX_VMCS_RO_IO_RIP   0x6408
#define VMX_VMCS_RO_IO_RSX   0x6404
#define VMX_VMCS_HOST_CR0   0x6C00
#define VMX_VMCS_HOST_CR3   0x6C02
#define VMX_VMCS_HOST_CR4   0x6C04
#define VMX_VMCS_HOST_FS_BASE   0x6C06
#define VMX_VMCS_HOST_GDTR_BASE   0x6C0C
#define VMX_VMCS_HOST_GS_BASE   0x6C08
#define VMX_VMCS_HOST_IDTR_BASE   0x6C0E
#define VMX_VMCS_HOST_RIP   0x6C16
#define VMX_VMCS_HOST_RSP   0x6C14
#define VMX_VMCS_HOST_SYSENTER_EIP   0x6C12
#define VMX_VMCS_HOST_SYSENTER_ESP   0x6C10
#define VMX_VMCS_HOST_TR_BASE   0x6C0A
#define VMX_VMCS_HOST_FIELD_CS   0xC02
#define VMX_VMCS_HOST_FIELD_DS   0xC06
#define VMX_VMCS_HOST_FIELD_ES   0xC00
#define VMX_VMCS_HOST_FIELD_FS   0xC08
#define VMX_VMCS_HOST_FIELD_GS   0xC0A
#define VMX_VMCS_HOST_FIELD_SS   0xC04
#define VMX_VMCS_HOST_FIELD_TR   0xC0C
#define VMX_VMCS_HOST_SYSENTER_CS   0x4C00
#define VMX_VMCS_RO_EXIT_INSTR_INFO   0x440E
#define VMX_VMCS_RO_EXIT_INSTR_LENGTH   0x440C
#define VMX_VMCS_RO_EXIT_INTERRUPTION_ERRCODE   0x4406
#define VMX_VMCS_RO_EXIT_INTERRUPTION_INFO   0x4404
#define VMX_VMCS_RO_EXIT_REASON   0x4402
#define VMX_VMCS_RO_IDT_ERRCODE   0x440A
#define VMX_VMCS_RO_IDT_INFO   0x4408
#define VMX_VMCS_RO_VM_INSTR_ERROR   0x4400

Functions

 DECLASM (int) VMXWriteVMCS64(uint32_t idxField
 DECLINLINE (void) VMXDisable(void)
 DECLINLINE (int) VMXEnable(RTHCPHYS pVMXOn)
 DECLINLINE (uint32_t) VMXGetLastError(void)

Variables

uint64_t u64Val


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